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AS 3708.3-1989廢止
Mechanical standardization of semiconductor devices General rules for the preparation of outline drawings of integrated circuits
出版：Standards Australia
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基本信息
標(biāo)準(zhǔn)編號： AS 3708.3-1989
標(biāo)準(zhǔn)類別：Standard
出版單位：Standards Australia
標(biāo)準(zhǔn)頁數(shù)：35
標(biāo)準(zhǔn)簡介
Specifies rules for the preparation of outline drawings of integrated circuits, indicating how case leads are to be numbered. Information is given on limits for dimensions, illustrations of letter symbols, terminal identification and index area, the design identification of circuit packages of the form G family and rules for such packages intended for automated handling. It is identical with and reproduced from IEC 191-3:1974 as supplemented by IEC 191-3A, 3B, 3C and 3D.
等同采用的國際標(biāo)準(zhǔn)
IEC 60191-3 Ed. 2.0 - Identical
